PLD
A PLD consists of a series of combinational logic circuits, or gates, and flip-flops. Combination logical circuits are circuits whose output is dependent at all times on a combination of their inputs; flip-flops are circuits that have two stable conditions, each one corresponding to one of two alternative input signals. The combination logic circuits and flip-flops are arranged into fully interconnected groups known as macrocells, such that a Boolean expression ̵1; an expression that evaluates to either ̶0;true̶1; or ̶0;false̶1; -- can be built inside each macrocell.
PLD Advantages
The most obvious advantage of a PLD over a CPLD is that a single microchip requires less surface area, wiring and power than several interconnected microchips. Furthermore, a PLD chip is designed for flexibility, so if a change to the logic is necessary it can be achieved by replacing one PLD chip with another without rewiring the circuitry to which the chip is connected. PLD chips were, in fact, the first type of chip that allowed this kind of flexible logic design in hardware.
CPLD
A CPLD is logically more complex than a PLD, but may not necessarily be physically larger. Unlike a PLD, the macrocells within a CPLD may not be fully interconnected. As a result, even though a CPLD contains enough combinational logic circuits and flip-flips to support a certain hardware configuration -- at least, in theory -- it may not support that configuration in practice.
CPLD Advantages
The increased complexity of a CPLD allow it to be programmed with more logical equations than a PLD and therefore to be put to a wider variety of uses. A CPLD can be used in the same way as a PLD for simple applications such as address decoding, but is more often used for high-performance logic applications, such as power sequencing, voltage level translation and timing control. The shorter power-up time and delay time of a CPLD makes it preferable to another type of programmable logic device, known as a field-programmable gate array (FPGA), in many applications.