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Charge-Device Model (CDM)
A Charged Device Model (CDM) event occurs when device rapidly discharges from contact with another conductive surface. The electronics industry discovered this when automated manufacturing caused devices to inexplicably fail in the late 1970s. Although industry adapted, the problem surfaced again with the production of denser, higher-performing devices operating beyond one Gigahertz (GHz). The more efficient processors get, the more charge is handled by semiconductors. In a 2010 industry update, the ESD Association reported that the circuit-performance trend led to increased ESD charge-device events between 2005 and 2009. The semiconductors of modern life are more susceptible to ESD due to their relatively low voltage tolerance.
Threshold Data
The first key to resolving this puzzle lies in the owner's manual for your piece of electronics. The "part data" sheet, or specifications, indicate threshold data: the maximum amount of current the semiconductor can tolerate. This comes with a bold caveat. Beware that threshold capacities vary widely among electronics devices. As of 2011, a common example was the surge-protective power bar's capacity to disable other devices plugged into it. The Reliability Analysis Center also publishes the Electrostatic Discharge Susceptibility Data for over 22,000 devices.
Electromagnetic Pulse (EMP) Data
Electromagnetic pulse data reveals the specifically-tested breakdown point for electrical device overload. Although EMP data can correspond with threshold data, they may not match. The old "VU" meter on an analog cassette tape deck could spike a bit into the "red" zone without producing any detectable distortion. This is an example of a little excess capacity that a product may be able to accept beyond the specified manufacturer's limit. The same is not true for a digital audio recording device: Any audio signal that spikes into the red zone will lead to distortion. The International Electrotechnical Commission (IEC), with its 40 member nations, has established ESD testing standards. Check the Resources section for further information.
Semiconductor Failures
According to Semtech, the leading ESD failure in metal oxide semiconductors is oxide punch-through. The oxide breaks down due to extreme over-voltage. The thinner the oxide, the greater the susceptibility. The electrostatic discharge of enough energy for a sufficient duration can cause junction burnout -- a total short in a semiconductor. Metallization burnout means an ESD pulse can melt the semiconductor's metal due to resistive (Joule) heating. Non-fatal ESD can cause parametric degradation: leakage and degradation of the parts until the semiconductor prematurely fails.